Use an op amp and a dual SPST to switch signals under digital control.
Many applications require a method of switching an analog or a digital signal on or off under digital control. A "wish list" of specifications for such a switch might include attenuation of less than 90 dB when the switch is in its offstate, distortion of no more than 0.002% when the switch is in its onstate, and the ability to respond to an on or an off command in 10 µsec or less. In addition, the circuit should accommodate positive or negativegoing signals, and no turnon or turnoff overshoot should occur for either signal polarity. The list might also require that the circuit's control input must accept digital signals from most logic families and that the circuit's SNR should exceed 90 dB.
The circuit in Figure 1, comprising IC_{1}, a lownoise, highspeed, precision Linear Technology LT1007 operational amplifier and IC_{2}, a Maxim MAX301 dual SPST, normally open analog switch, fulfills these requirements. In the circuit, V_{IN} is the input voltage, and V_{OS} and I_{OS} represent operational amplifier IC_{1}'s voltage and current offsets of either polarity. I_{OFF} represents the offstate leakage current of either section of analog switch IC_{2}. In the buffer circuit, R=R_{1}=R_{2}, and R_{4}=R/2. Hence, ΔR=(R_{1}×R_{2})/(R_{1}+R_{2})–R_{4}.
If all resistors were identical in value, ΔR would equal zero. However, each resistor exhibits its own tolerance error, and the equation for ΔR expands to:
where e_{1} through e_{4} are maximum tolerance errors of ±1%. Worstcase values for ΔR occur when the tolerance values e_{1} and e_{2} for R_{1} and R_{2} are of the same sign and e_{4} for R_{4 }has the opposite sign:
Simplifying further, ΔR=±Re}=±{(0.01)R} when you use 1%tolerance resistors for R_{1}, R_{2}, and R_{4}. The combination of the resistors' tolerances with the operational amplifier's internal errors and leakage effects from switches IC_{2A} and IC_{2B} determines the buffer's accuracy. When the circuit is on, both IC_{2A} and IC_{2B} are open. The following equation defines the circuit's output voltage:
Simplifying further, you can calculate V_{OUT(ON)} as: V_{OUT(ON)}=–(V_{IN})+V_{OS}+((I_{OS})×(ΔR))+((I_{OFF})×(R)).
Most of today's solidstate switches present an I_{OFF} of less than 1 nA, and you can select an op amp for IC_{1} whose V_{OS} is less than 50 µV and whose I_{OS} is less than 50 nA. Thus, for the resistor values in Figure 1, the maximum error for the amplifier's onstate is approximately 80 µV, or 0.0008%, when referred to a 10V nominal output. You can determine the minimum allowable value of the amplifier's load resistance by solving the following equation:
where V_{SAT} represents the op amp's maximum saturated output voltage—usually, 13.5V for ±15V powersupply voltages. For example, using the resistor values in Figure 1 and assuming a maximum output voltage of 10V, you can calculate a minimum allowable load resistance of 3.3 kΩ.
Also, I_{AMP}, the current from IC_{1}, should be less than the device's specified maximum current output: I_{AMP}=(V_{OUTMAX})×[(1/R_{2})+(1/R_{LOAD})].
Using these values, you can determine that I_{AMP} is 3.5 mA, which is less current than most op amps as sources deliver. When the amplifier is off, switches IC_{2A} and IC_{2B} are closed. In this state, the worstcase output occurs for V_{INMAX}. IC_{1}'s offset errors are negligible with respect to the fullscale input voltage. Therefore, for the real case in which the onresistance of IC_{2A} and IC_{2B} is much less than the load resistance, the following equation defines the circuit's output voltage: V_{OUTOFF}=–[(V_{IN}×R_{2}×R_{ON}×R_{ON})/(K_{1}+K_{2}+K_{3}–K_{4})], where K_{1}=R_{1}×R_{2}×R_{3}, K_{2}=R_{1}×R_{3}×R_{ON}, K_{3}=R_{1}×R_{ON}×R_{ON}, and K_{4}=R_{1}×R_{2}×R_{ON}. For R_{1}=R_{2}=R and R_{ON}<<R, and R_{ON}<<R_{3}, the equation simplifies to: V_{OUTOFF}=–[(V_{IN}×R_{ON}×R_{ON})/(R×R_{3})].
Many of today's analog switches present a maximum 20Ω onresistance, and, using the resistor values in Figure 1 and an input voltage of 10V, you can calculate that output voltage to be approximately 200 µV, or 0.002%, when referred to a 10V nominal output. Amplifier IC_{1}'s slew rate limits the circuit's dynamic behavior, because analog switch IC_{2} generally switches in much less than 1 µsec. Using an operational amplifier with a slew rate of 1.5V/µsec yields a circuitresponse time of 10 µsec.
For applications that require unipolar outputs when the amplifier is in its offstate, you can add a known outputoffset voltage by connecting resistor R_{5} between the buffer's output and the powersupply voltage of the same polarity as the desired offset voltage. Note that IC_{1}'s output must be able to sink current. Adding resistor R_{5} doesn't affect the circuit's output voltage in its onstate because the closedloop gain lowers the amplifier's output impedance.
To analyze the circuit's offset output voltage, assume that IC_{2A} and IC_{2B} present an onresistance that's much less than R_{LOAD}, R_{2}, and R_{5}. The following equations define the circuit's positive and negative offsetoutput voltages, V_{OUT(OS)} and –V_{OUT(OS)}, respectively: To make the offset voltage less dependent on the input signal, calculate the maximum value for R_{5} as:
Using the resistor values in Figure 1, solving this equation produces a minimum reliable offset voltage of 2 mV; the value of R_{5} must be 150 kΩ or less. The maximum currentsinking ability of IC_{1} determines the minimum value of R_{5}.
